Field of the Invention
The present invention relates to a transistor that amplifies a high frequency signal.
Background Art
A field-effect transistor (FET) includes a plurality of transistor cells which are connected in parallel to each other (e.g., see Japanese Patent Application Laid-Open No. 6-5636). This causes power outputted from the respective transistor cells to be combined, allowing the transistor as a whole to obtain large output power. Wires or probes to supply the output power to outside or apply a drain bias voltage to the transistor are connected to this drain pad.
FIG. 3 is a plan view illustrating a conventional transistor. A plurality of gate electrodes 2, a plurality of source electrodes 3, a plurality of drain electrodes 4, a gate pad 5, a source pad 6 and a drain pad 7 are formed on a semiconductor substrate 1. The gate pad 5 is connected to the plurality of gate electrodes 2, the source pad 6 is connected to the plurality of source electrodes 3, and the drain pad 7 is connected to the plurality of drain electrodes 4. A ground metal (not shown) is formed on the back side of the semiconductor substrate 1. A ground potential is applied to the source electrode 3 via the source pad 6 and a via hole 9 inside the semiconductor substrate 1.
It is generally known that resonance and oscillation can occur inside a transistor that combines a plurality of transistor cells. For example, when an electromagnetic field analysis is performed on the transistor in FIG. 3, it is predicted that resonance occurs at 17 GHz. When this resonance occurs, a standing wave of an electric field is generated right under the drain pad 7. That is, such a situation occurs that the intensity of the electric field directed from the drain pad 7 to the ground metal of the back side varies from one location to another of the drain pad 7. If the transistor has a sufficient gain at 17 GHz, an oscillation may occur at this frequency.
FIG. 4 is a plan view illustrating an improved conventional transistor. A resistor 13 is formed inside the drain pad 7 to suppress the above-described resonance and oscillation. When a resonance occurs inside the transistor and a standing wave of an electric field is generated right under the drain pad 7, an AC current that flows in the vertical direction is generated on the surface of the drain pad 7. An AC current also flows through the resistor 13 inside the drain pad 7 and electric energy of 17 GHz is converted to thermal energy. For this reason, loss is generated at 17 GHz and the oscillation is suppressed. On the other hand, if the frequency of a signal to be amplified is sufficiently low and each transistor cell 8 operates uniformly, the electric field right under the drain pad 7 has the same intensity regardless of the position. At this time, no current flows through the resistor 13. Therefore, performance never deteriorates at a desired frequency.
When the frequency of a signal to be amplified becomes higher, each transistor cell 8 may operate nonuniformly. In this case, if the resistor 13 is formed inside the drain pad 7, an AC current flows through the resistor 13. As a result, loss is generated also in the signal to be amplified and output power or power addition efficiency deteriorates. For this reason, there is a problem that the performance of the transistor deteriorates. Furthermore, in the case of a high output transistor, the resistor 13 may be damaged because an AC current that can flow through the resistor 13 when a nonuniform operation occurs is extremely large.